Sample and hold
Each time an input event is received block copy its input on the
output and hold it until input event. For periodic Sample and hold,
event input must be generated by a Clock.
- Datatype(-1=inherit 1=real double 2=Complex 3=int32 ...)
Output datatype. This block can support all data types.
Properties : Type 'vec' of size 1.
- always active: no
- direct-feedthrough: yes
- zero-crossing: no
- mode: no
- regular inputs:
- port 1 : size [-1,-2] / type 1
- regular outputs:
- port 1 : size [-1,-2] / type 1
- number/sizes of activation inputs: 1
- number/sizes of activation outputs: 0
- continuous-time state: no
- discrete-time state: no
- object discrete-time state: no
- name of computational function: samphold4_m
- SCI/macros/scicos_blocks/Linear/SAMPHOLD_m.sci [view code]
Fady NASSIF INRIA