D latch flip-flop
This block outputs the input state when the input gate is high.
The input is D the enable is C. Q and !Q are the outputs of
this block. This block is almost used with digital number,
the input data type is int8.
The truth table of this block is
| C |
D |
Q |
!Q |
| 0 |
0 |
0 |
1 |
| 0 |
1 |
0 |
1 |
| 1 |
0 |
0 |
1 |
| 1 |
1 |
1 |
0 |
- always active: no
- direct-feedthrough: yes
- zero-crossing: no
- mode: no
- regular inputs:
- port 1 : size [1,1] / type 5
- port 2 : size [1,1] / type -1
- regular outputs:
- port 1 : size [1,1] / type 5
- port 2 : size [1,1] / type 5
- number/sizes of activation inputs: 0
- number/sizes of activation outputs: 0
- continuous-time state: no
- discrete-time state: no
- object discrete-time state: no
- name of computational function: csuper
- SCI/macros/scicos_blocks/IntegerOp/DLATCH.sci [view code]
Fady NASSIF INRIA
