Logical and
This block, with two event inputs and a regular output, outputs +1 or
-1 on its regular output depending on input events.
- +1 : When events are synchronously (present on both event input ports),
- -1 : When only one event is present.
- always active: no
- direct-feedthrough: no
- zero-crossing: no
- mode: no
- regular outputs:
- port 1 : size [1,1] / type 1
- number/sizes of activation inputs: 2
- number/sizes of activation outputs: 0
- continuous-time state: no
- discrete-time state: no
- object discrete-time state: no
- name of computational function: andlog
- SCI/macros/scicos_blocks/Events/ANDLOG_f.sci [view code]
Ramine Nikoukhah INRIA